Email: firstname.lastname@example.org; Tel: (852) 2358 7203
Ricky Lee received his PhD degree in Aeronautical & Astronautical Engineering from Purdue University. He joined the Hong Kong University of Science & Technology (HKUST) in 1993. During his career of tenure-track faculty at HKUST, Dr Lee once was on secondment to serve as Chief Technology Officer of Nano & Advanced Materials Institute (NAMI) for three years. Currently Dr Lee is Chair Professor of Mechanical and Aerospace Engineering (MAE) and Director of HKUST Foshan Research Institute for Smart Manufacturing (FRISM) at HKUST. He also has concurrent appointments as Acting Dean of Systems Hub of HKUST Guangzhou campus, Executive Director of HKUST Shenzhen Platform Development Office, and Director of HKUST LED-FPD Technology R&D Center at Foshan, Guangdong, China. Dr Lee has been focusing his research on the development of packaging and assembly technologies for electronics and optoelectronics. His R&D activities cover wafer level packaging for heterogeneous integration, additive manufacturing for microsystems, LED packaging, and reliability engineering. The research outcomes of Dr Lee’s group have been documented in numerous technical papers in international journals and conference proceedings. He also co-authored 3 books and 9 book chapters. Due to his technical contributions, Dr Lee received many honours and awards over the years. Dr Lee is Life Fellow of ASME and IMAPS, and Fellow of IEEE and Institute of Physics (UK). He also serves as Editor-in-Chief of ASME Journal of Electronic Packaging.
Email: email@example.com; Tel: (852) 2358 8356
Dr. Lo received his Bachelor (1st Class Honour) and MPhil degrees in Mechanical Engineering Department from the Hong Kong University of Science and Technology (HKUST) in 2002 and 2004 respectively. He then joined EPACK Lab of HKUST as a Senior Technical Officer and provided professional technical supports to various users, including undergraduate and postgraduate students from different departments and worldwide industrial partners. To further develop his R&D career, he completed his PhD degree in HKUST in 2008 and continued offering support to the lab at the same time. He is now the Program Manager of the lab who focuses on R&D projects with various international companies, such as Agilent, ASE, Oracle, MacDermid, Huawei, ZTE etc. The topics of his research interests include flip chip technology, wafer level packaging and LED packaging. He was granted the 2004 ECTC Best Poster Paper Award (May 2005), Young Award in IEEE 9th VLSI Packaging Workshop in Japan (Dec 2008) and IEEE-CPMT Outstanding Young Engineer Award in 2015. He was the IEEE-CPMT Hong Kong Chapter Chairman in 2015-2016.
Email: firstname.lastname@example.org; Tel: (852) 2358 8444
Xing QIU received his BSc from Jilin University in Mechanical Engineering in 2013. In 2020, he graduated from the Hong Kong University of Science & Technology (HKUST) with a PhD degree focusing on electronic packaging area. He gained significant experience on UV LED packaging and additive manufacturing technologies during his research study. He also served as a research assistant in the Center for Advanced Microsystems Packaging (CAMP) for 5 years and engaged in many microelectronics packaging projects. The projects include additive manufacturing for electronics packaging, medical device packaging and LED packaging. He was granted the IEEE EPS Japan Chapter Young Award and IPC Dieter Bergman Scholarship in 2019.
Email: email@example.com; Tel: (852) 2358 8444
Qian received her PhD in Mechanical Engineering from the University of Maryland in 2021. Her dissertation research focused on modeling the anisotropic mechanical behavior of oligocrystalline SnAgCu solder alloys based on microstructure and dislocation mechanisms, in order to provide insights for solder joints reliability analysis. As a graduate research assistant at the Center for Advanced Life Cycle Engineering (CALCE), she has been involved in several research projects with industrial sponsors, especially in the characterization, reliability testing and modeling of solder materials, and fatigue failure analysis of redistributions layers on wafer-level-chip-scale-package.